Semiconductor integrated circuits, as well as the design, manufacture, and operation of such circuits, are well known in the art. Common to such circuits is an epitaxially grown single crystal film in which various regions of different conductivity type are interconnected by multiple layers of patterned electrically conducting material.
A variety of electrically conducting material is available for implementing the layers. Gold, copper, aluminum, polysilicon, and various metal alloys, for example, are all suitable to some extent. On the other hand, each has its drawbacks as is well known in the art.
In the large scale integration (LSI)-MOS-FET technology, polysilicon has become the standard material for the conducting layer closest to the epitaxial film. Typically, the polysilicon layer is a first layer separated from a second electrically conducting overlay by an insulating layer typically of silicon dioxide. But polysilicon exhibits relatively high resistivity and the lengths of polysilicon paths is limited as a consequence. For example, various functional areas in an integrated circuit chip cannot be interconnected together directly by polysilicon. Rather, the connection from each area are brought out to aluminum bus bars formed from the second overlay. Similarly, LSI high speed circuits require high conductivity input-output lines. The requirement results in the exclusion of polysilicon as a material for such use. Aluminum power lines are needed and this often requires aluminum bonding pads within the chip. The additional aluminum areas are, essentially, wasted space and parallel aluminum conductors create yield problems.
A relatively high conductivity material leading to the elimination of aluminum from use in the above-mentioned applications in integrated circuits would lead to, for example, a semiconductor memory cell size reduction of from 30 to 50%.